IRIS
PETRA, NICOLA
 Distribuzione geografica
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Continente #
AS - Asia 2.978
NA - Nord America 2.807
EU - Europa 2.247
SA - Sud America 287
AF - Africa 54
Continente sconosciuto - Info sul continente non disponibili 4
OC - Oceania 2
Totale 8.379
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Nazione #
US - Stati Uniti d'America 2.722
SG - Singapore 1.351
RU - Federazione Russa 931
IT - Italia 669
CN - Cina 552
VN - Vietnam 517
BR - Brasile 226
HK - Hong Kong 197
DE - Germania 134
FR - Francia 98
FI - Finlandia 86
UA - Ucraina 80
IN - India 69
IE - Irlanda 58
JP - Giappone 55
GB - Regno Unito 54
CA - Canada 52
KR - Corea 52
BD - Bangladesh 34
SE - Svezia 33
AR - Argentina 22
TR - Turchia 22
AT - Austria 21
IQ - Iraq 20
TH - Thailandia 20
MX - Messico 19
NL - Olanda 19
PH - Filippine 19
PL - Polonia 18
ZA - Sudafrica 15
CZ - Repubblica Ceca 9
EC - Ecuador 9
ID - Indonesia 9
TW - Taiwan 9
CO - Colombia 8
ES - Italia 8
KE - Kenya 7
PK - Pakistan 7
PY - Paraguay 7
VE - Venezuela 6
CH - Svizzera 5
EG - Egitto 5
NP - Nepal 5
TN - Tunisia 5
CL - Cile 4
DK - Danimarca 4
DZ - Algeria 4
IR - Iran 4
LB - Libano 4
MA - Marocco 4
NG - Nigeria 4
RO - Romania 4
AZ - Azerbaigian 3
EU - Europa 3
IL - Israele 3
JM - Giamaica 3
LT - Lituania 3
OM - Oman 3
UY - Uruguay 3
UZ - Uzbekistan 3
AU - Australia 2
BG - Bulgaria 2
CR - Costa Rica 2
JO - Giordania 2
MR - Mauritania 2
PE - Perù 2
PS - Palestinian Territory 2
RS - Serbia 2
SA - Arabia Saudita 2
AE - Emirati Arabi Uniti 1
AL - Albania 1
AM - Armenia 1
BA - Bosnia-Erzegovina 1
BB - Barbados 1
BE - Belgio 1
BQ - ???statistics.table.value.countryCode.BQ??? 1
BW - Botswana 1
BY - Bielorussia 1
CI - Costa d'Avorio 1
CY - Cipro 1
DO - Repubblica Dominicana 1
GE - Georgia 1
GH - Ghana 1
GM - Gambi 1
GR - Grecia 1
GT - Guatemala 1
HN - Honduras 1
IS - Islanda 1
KG - Kirghizistan 1
KH - Cambogia 1
KW - Kuwait 1
KZ - Kazakistan 1
LC - Santa Lucia 1
LK - Sri Lanka 1
LU - Lussemburgo 1
LV - Lettonia 1
LY - Libia 1
MK - Macedonia 1
MM - Myanmar 1
MO - Macao, regione amministrativa speciale della Cina 1
Totale 8.369
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Città #
Singapore 641
San Jose 401
Chandler 289
Moscow 215
Santa Clara 193
Hong Kong 185
Ashburn 174
Beijing 159
Naples 150
Hanoi 136
Ho Chi Minh City 133
Napoli 95
Jacksonville 84
Hefei 80
Millbury 67
Lauterbourg 64
The Dalles 64
Princeton 61
Los Angeles 54
Nanjing 54
Tokyo 48
Boston 47
Milan 43
Fairfield 42
Seoul 39
Wilmington 39
New York 33
Boardman 31
Buffalo 30
Des Moines 29
Helsinki 28
Frankfurt am Main 26
Munich 26
Woodbridge 24
Chicago 23
Redondo Beach 23
Da Nang 22
Ottawa 22
São Paulo 20
Nuremberg 17
Orem 17
Council Bluffs 16
Dallas 16
Haiphong 16
Kronberg 16
Chennai 15
Ann Arbor 14
Brooklyn 14
Amsterdam 13
Warsaw 13
Castellammare Di Stabia 12
Seattle 12
Falkenstein 11
Johannesburg 11
Phoenix 11
Rome 11
Tianjin 11
Guangzhou 10
Lawrence 10
Mexico City 10
Rio de Janeiro 10
Shenyang 10
Baghdad 9
Denver 9
Florence 9
Hebei 9
Nanchang 9
Atlanta 8
Belo Horizonte 8
Duncan 8
Istanbul 8
London 8
Manchester 8
Norwalk 8
Changsha 7
Dhaka 7
Hải Dương 7
Montreal 7
Nairobi 7
Redwood City 7
San Francisco 7
Shanghai 7
Bangkok 6
Bexley 6
Jiaxing 6
Kunming 6
Memphis 6
Orta 6
Sarno 6
Stockholm 6
Toronto 6
Vienna 6
Asunción 5
Biên Hòa 5
Boydton 5
Carinola 5
Houston 5
Indiana 5
Lusciano 5
Mumbai 5
Totale 4.447
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Nome #
Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements 199
Single Bit Filtering Circuit Implemented in a System for the Generation of Colored Noise 184
On the Use of Approximate Multipliers in LMS Adaptive Filters 163
A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS 156
A high-speed sense-amplifier based flip-flop 150
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding 149
Stall-Aware Fixed-Point Implementation of LMS Filters 140
A SISO register circuit tailored for input data with low transition probability 137
A 1.27GHz, All-Digital Spread Spectrum Clock Generator-Synthesizer in 65nm CMOS 136
Variable Latency Speculative Han-Carlson Adder 136
Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs 136
Single Flip-flop Driving Circuit for glitch-free NAND-based Digitally Controlled Delay-Lines 136
Approximate Multipliers Based on New Approximate Compressors 136
Approximate Floating-Point Multiplier based on Static Segmentation 134
A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread-Spectrum Capability 134
Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers 132
A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization Free SoC Applications 131
An FPGA-Oriented Algorithm for Real-Time Filtering of Poisson Noise in Video Streams, with Application to X-Ray Fluoroscopy 128
A 41 ps ASIC time-to-digital converter for physics experiments 127
On the Use of Approximate Adders in Carry-Save Multiplier-Accumulators 127
An area-efficient high-speed Reed-Solomon decoder in 0.25um CMOS 126
Accurate Fixed-Point Logarithmic Converter 126
A High Speed Differential Resistor Ladder 125
A novel high-speed sense-amplifier-based flip-flop 124
A Novel Truncated Squarer with Linear Compensation Function 124
An FFT-based coprocessor for real time video processing 115
High Speed Differential Resistor Ladder for A/D Converters 115
A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter with Low Steady-State Error 115
A 430 MHz, 280 mW processor for the conversion of Cartesian to polar coordinates in 0.25um CMOS 113
A 380MHz Direct Digital Synthesizer/Mixer with Hybrid CORDIC Architecture in 0.25um CMOS 112
Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA 112
Truncated Squarer with Minimum Mean-Square Error 112
FPGA architecture for real time video segmentation and denoising 111
Design of Fixed-Width Multipliers with Linear Compensation Function 110
Dual-Field Arithmetic Core for High-Performance Cryptographic Operations 109
Direct Digital Frequency Synthesizer Using Non-Uniform Piecewise-Linear Approximation 109
Variable-Rounded LMS Filter for Low-Power Applications 109
Low-power approximate multiplier with error recovery using a new approximate 4-2 compressor 108
A novel low-power DLMS adaptive filter with sign-magnitude learning and approximated FIR section 107
Dual-tree error compensation for high performance fixed-width multipliers 107
Code Compression for ARM7 Embedded Systems 107
A high-speed and high-accuracy interpolator for digital modems 107
Fixed-Width CSD Multipliers with Minimum Mean Square Error 107
Hardware implementation of a spatio-temporal average filter for real-time denoising of fluoroscopic images 106
A Novel Low-Power High-Precision Implementation for Sign–Magnitude DLMS Adaptive Filters 106
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS 105
Fixed-Width Multipliers and Multipliers-Accumulators With Min-Max Approximation Error 105
Hardware Performance Versus Video Quality Trade-Off for Gaussian Mixture Model Based Background Identification Systems 103
Analysis of spread-spectrum clocking modulations under synchronization timing constraint 103
Super Resolution CNN for a quincunx sampling-based panchromatic earth observation imager for nanosatellites 102
OpenCV compatible real time processor for background foreground identification 102
Low error Truncated Multipliers for DSP applications 101
Truncated Binary Multipliers with Variable Correction and Minimum Mean Square Error 101
A high performance floating-point special function unit using constrained piecewise quadratic approximation 100
A Novel Architecture for Galois Fields GF(2^m) Multipliers Based on Mastrovito Scheme 100
FPGA Hardware Acceleration for Deep Learning-based Satellite Pose Estimation 98
A 380MHz, 150mW Direct Digital Synthesizer/Mixer in 0.25um CMOS 98
Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding 98
A 630MHz, 76mW, Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique 97
FPGA Implementation of Gaussian Mixture Model Algorithm for 47fps Segmentation of 1080p Video 97
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree 97
Design of fixed-width multipliers with minimum mean square error 96
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate 96
Digital Synthesizer/Mixer with Hybrid CORDIC Multiplier Architecture: Error Analysis and Optimization 94
NORA based TDC in 90 nm CMOS 93
A 630MHz Direct Digital Frequency Synthesizer with 90dBc SFDR in 0.25um CMOS 92
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method 91
Constrained Piecewise Polynomial Approximation for Hardware Implementation of Elementary Functions 91
High Speed Galois Fields GF(2^m) Multipliers 88
Elementary Functions Hardware Implementation Using Constrained Piecewise Polynomial Approximations 85
Efficient implementation of pseudochaotic piecewise linear maps with high digitization accuracies 82
High Performance Special Function Unit for Programmable 3D Graphics Processors 81
Efficient Logarithmic Converters for Digital Signal Processing Applications 69
Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error 66
Fixed-width Multipliers with Dual-tree Error Compensation 65
Totale 8.489
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Categoria #
all - tutte 28.446
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 28.446
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2021/2022392 7 3 3 6 8 26 1 7 87 6 75 163
2022/2023616 76 69 28 53 80 83 5 68 95 10 37 12
2023/2024460 21 63 85 35 23 51 24 31 2 5 62 58
2024/20252.150 101 127 12 20 84 162 212 133 87 120 891 201
2025/20263.744 424 202 378 376 623 156 359 247 549 285 80 65
2026/202770 70 0 0 0 0 0 0 0 0 0 0 0
Totale 8.489