Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding

Least Mean Square (LMS) filters are the most used adaptive filters with applications ranging from channel equalization to system identification and noise cancellation. An LMS adaptive filter includes two main parts: a FIR filter and a block for coefficients updating that exploits the LMS algorithm. The hardware implementation of LMS filter requires a significant number of multipliers, adders and registers, resulting in power consumption issues. In this paper we propose a novel approximate, low-power implementation of the coefficients update block. In the proposed approach, the signal precision is dynamically scaled by using a time-variable rounding. The circuit can select between three levels of precision: no rounding, light rounding and strong rounding. An observation block decides at runtime the rounding level, based on the magnitude of the LMS error signal. In this way, it is possible to minimize the convergence error while significantly reducing the switching activity when the algorithm is close to the convergence. VLSI implementation in TSMC 28nm CMOS technology shows that proposed approach results in a maximum power saving of 27% with respect to a standard LMS, with negligible degradation of error performances and limited area overhead.