PETRA, NICOLA
PETRA, NICOLA
DIPARTIMENTO DI INGEGNERIA ELETTRICA E TECNOLOGIE DELL'INFORMAZIONE
An area-efficient high-speed Reed-Solomon decoder in 0.25um CMOS
2004 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola
A 630MHz, 76mW, Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique
2007 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS
2004 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola
FPGA Implementation of Gaussian Mixture Model Algorithm for 47fps Segmentation of 1080p Video
2013 Genovese, Mariangela; Napoli, Ettore; DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Hardware Performance Versus Video Quality Trade-Off for Gaussian Mixture Model Based Background Identification Systems
2014 Genovese, Mariangela; Napoli, Ettore; Petra, Nicola
A 380MHz Direct Digital Synthesizer/Mixer with Hybrid CORDIC Architecture in 0.25um CMOS
2007 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Dual-Field Arithmetic Core for High-Performance Cryptographic Operations
2008 Cilardo, Alessandro; R., Piscitelli; Mazzocca, Nicola; Petra, Nicola
An FFT-based coprocessor for real time video processing
2012 Lopez, Giorgio; Petra, Nicola; DE CARO, Davide; Napoli, Ettore
Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method
2008 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
A high-speed sense-amplifier based flip-flop
2005 DE CARO, Davide; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
A 380MHz, 150mW Direct Digital Synthesizer/Mixer in 0.25um CMOS
2006 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
A 630MHz Direct Digital Frequency Synthesizer with 90dBc SFDR in 0.25um CMOS
2006 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
A 41 ps ASIC time-to-digital converter for physics experiments
2011 Stefano, Russo; Petra, Nicola; DE CARO, Davide; Barbarino, Giancarlo; Strollo, ANTONIO GIUSEPPE MARIA
Digital Synthesizer/Mixer with Hybrid CORDIC Multiplier Architecture: Error Analysis and Optimization
2009 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Elementary Functions Hardware Implementation Using Constrained Piecewise Polynomial Approximations
2011 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola
FPGA architecture for real time video segmentation and denoising
2012 Genovese, Mariangela; Petra, Nicola; DE CARO, Davide; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA
Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error
2011 V., Garofalo; Petra, Nicola; Napoli, Ettore
High Performance Special Function Unit for Programmable 3D Graphics Processors
2009 DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
A High Speed Differential Resistor Ladder
2012 DE CARO, Davide; Coppola, Marino; Petra, Nicola
Constrained Piecewise Polynomial Approximation for Hardware Implementation of Elementary Functions
2008 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola; Napoli, Ettore; Garofalo, Valeria
| Titolo | Tipologia | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|---|
| An area-efficient high-speed Reed-Solomon decoder in 0.25um CMOS | 4.1 Articoli in Atti di convegno | 2004 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola | |
| A 630MHz, 76mW, Direct Digital Frequency Synthesizer Using Enhanced ROM Compression Technique | 1.1 Articolo in rivista | 2007 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola | |
| High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS | 4.1 Articoli in Atti di convegno | 2004 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola | |
| FPGA Implementation of Gaussian Mixture Model Algorithm for 47fps Segmentation of 1080p Video | 1.1 Articolo in rivista | 2013 | Genovese, Mariangela; Napoli, Ettore; DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| Hardware Performance Versus Video Quality Trade-Off for Gaussian Mixture Model Based Background Identification Systems | 4.1 Articoli in Atti di convegno | 2014 | Genovese, Mariangela; Napoli, Ettore; Petra, Nicola | |
| A 380MHz Direct Digital Synthesizer/Mixer with Hybrid CORDIC Architecture in 0.25um CMOS | 1.1 Articolo in rivista | 2007 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| Dual-Field Arithmetic Core for High-Performance Cryptographic Operations | 4.1 Articoli in Atti di convegno | 2008 | Cilardo, Alessandro; R., Piscitelli; Mazzocca, Nicola; Petra, Nicola | |
| An FFT-based coprocessor for real time video processing | 4.1 Articoli in Atti di convegno | 2012 | Lopez, Giorgio; Petra, Nicola; DE CARO, Davide; Napoli, Ettore | |
| Reducing Lookup-Table Size in Direct Digital Frequency Synthesizers Using Optimized Multipartite Table Method | 1.1 Articolo in rivista | 2008 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| A high-speed sense-amplifier based flip-flop | 4.1 Articoli in Atti di convegno | 2005 | DE CARO, Davide; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| A 380MHz, 150mW Direct Digital Synthesizer/Mixer in 0.25um CMOS | 4.1 Articoli in Atti di convegno | 2006 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| A 630MHz Direct Digital Frequency Synthesizer with 90dBc SFDR in 0.25um CMOS | 4.1 Articoli in Atti di convegno | 2006 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| A 41 ps ASIC time-to-digital converter for physics experiments | 1.1 Articolo in rivista | 2011 | Stefano, Russo; Petra, Nicola; DE CARO, Davide; Barbarino, Giancarlo; Strollo, ANTONIO GIUSEPPE MARIA | |
| Digital Synthesizer/Mixer with Hybrid CORDIC Multiplier Architecture: Error Analysis and Optimization | 1.1 Articolo in rivista | 2009 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| Elementary Functions Hardware Implementation Using Constrained Piecewise Polynomial Approximations | 1.1 Articolo in rivista | 2011 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola | |
| FPGA architecture for real time video segmentation and denoising | 4.1 Articoli in Atti di convegno | 2012 | Genovese, Mariangela; Petra, Nicola; DE CARO, Davide; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA | |
| Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error | 1.1 Articolo in rivista | 2011 | V., Garofalo; Petra, Nicola; Napoli, Ettore | |
| High Performance Special Function Unit for Programmable 3D Graphics Processors | 1.1 Articolo in rivista | 2009 | DE CARO, Davide; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA | |
| A High Speed Differential Resistor Ladder | 1.1 Articolo in rivista | 2012 | DE CARO, Davide; Coppola, Marino; Petra, Nicola | |
| Constrained Piecewise Polynomial Approximation for Hardware Implementation of Elementary Functions | 4.1 Articoli in Atti di convegno | 2008 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Petra, Nicola; Napoli, Ettore; Garofalo, Valeria |