his paper describes the implementation of a novel high-speed differential resistor ladder suited for A/D converters. The novel ladder yields, theoretically, up to a sixteen-fold reduction of the propagation delay with respect to the conventional differential ladder. Simulation results, for a BiCMOS 0.25μm technology, show that the novel ladder results in a fivefold increase of the maximum sampling frequency when employed to design a 8-bit Flash converter. A 70% higher speed is also highlighted when the ladder is employed in a Folding and Interpolating 8-bit converter.

High Speed Differential Resistor Ladder for A/D Converters

DE CARO, Davide;COPPOLA, MARINO;PETRA, NICOLA;NAPOLI, ETTORE;STROLLO, ANTONIO GIUSEPPE MARIA;GAROFALO, VALERIA
2010

Abstract

his paper describes the implementation of a novel high-speed differential resistor ladder suited for A/D converters. The novel ladder yields, theoretically, up to a sixteen-fold reduction of the propagation delay with respect to the conventional differential ladder. Simulation results, for a BiCMOS 0.25μm technology, show that the novel ladder results in a fivefold increase of the maximum sampling frequency when employed to design a 8-bit Flash converter. A 70% higher speed is also highlighted when the ladder is employed in a Folding and Interpolating 8-bit converter.
9781424453085
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11588/364546
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