IRIS
BARBARESCHI, MARIO
 Distribuzione geografica
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Continente #
NA - Nord America 629
EU - Europa 454
AS - Asia 97
SA - Sud America 6
Totale 1.186
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Nazione #
US - Stati Uniti d'America 601
IT - Italia 285
NL - Olanda 92
CN - Cina 51
CA - Canada 27
IE - Irlanda 22
SG - Singapore 21
DE - Germania 15
JP - Giappone 14
FI - Finlandia 13
BR - Brasile 6
GB - Regno Unito 6
SE - Svezia 5
FR - Francia 4
HK - Hong Kong 4
AT - Austria 3
TW - Taiwan 3
IN - India 2
KR - Corea 2
MK - Macedonia 2
BG - Bulgaria 1
CH - Svizzera 1
CR - Costa Rica 1
ES - Italia 1
GR - Grecia 1
LT - Lituania 1
RS - Serbia 1
RU - Federazione Russa 1
Totale 1.186
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Città #
Chandler 154
Amsterdam 92
Ashburn 68
Naples 46
Millbury 41
Rome 32
Napoli 27
Ottawa 26
Des Moines 20
Nanjing 20
Lawrence 18
Wilmington 15
Boston 14
Princeton 13
Milan 11
Singapore 11
Sessa Aurunca 10
Dublin 8
Shenyang 8
Tokyo 8
Bari 7
Beijing 6
Kronberg 6
Porto Alegre 6
Giugliano In Campania 5
Jiaxing 5
Nanchang 5
Torre Annunziata 5
Angri 4
Catania 4
Hong Kong 4
Siena 4
Tianjin 4
Bolzano 3
Chicago 3
Marcianise 3
Potenza 3
Zhongxing 3
Afragola 2
Alvignano 2
Changsha 2
Chennai 2
Fairfield 2
Freiburg 2
Grigno 2
Helsinki 2
Lit 2
Manfredonia 2
Monte di Procida 2
Naperville 2
Poggiomarino 2
Redwood City 2
Ruvo di Puglia 2
San Giorgio A Cremano 2
San Jose 2
Sant'Antimo 2
Schwaig 2
Turin 2
Vienna 2
Vinci 2
Woodbridge 2
Aachen 1
Andover 1
Ann Arbor 1
Arezzo 1
Athens 1
Battipaglia 1
Belgrade 1
Boardman 1
Bollate 1
Boydton 1
Capua 1
Casoria 1
Cassino 1
Cava de' Tirreni 1
Chuo 1
Cologne 1
Dearborn 1
Edinburgh 1
Frankfurt am Main 1
Giugliano in Campania 1
Hebei 1
Houston 1
Indiana 1
Khimki 1
L'aquila 1
Lappeenranta 1
Locri 1
Los Angeles 1
Madrid 1
Modena 1
Norwalk 1
Portland 1
Quarto 1
Reston 1
Richmond 1
San Giuseppe Vesuviano 1
San José 1
Sant'Agnello 1
Seattle 1
Totale 807
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Nome #
Decision Tree-Based Multiple Classifier Systems: An FPGA Perspective 66
An FPGA-based Smart Classifier for Decision Support Systems 44
Partial FPGA bitstream encryption enabling hardware DRM in mobile environments 43
How to manage keys and reconfiguration in WSNs exploiting SRAM based PUFs 40
Approximate Decision Tree-Based Multiple Classifier Systems 38
A hardware accelerator for data classification within the sensing infrastructure 37
Automatic design space exploration of approximate algorithms for big data applications 36
Designing an SRAM PUF-based secret extractor for resource-constrained devices 35
Outperforming Image Segmentation by Exploiting Approximate K-Means Algorithms 34
Synthesis of finite state machines on memristor crossbars 34
XbarGen: A memristor based boolean logic synthesis tool 33
On the adoption of Physically Unclonable Functions to secure IIoT devices 32
Testing 90 nm microcontroller SRAM PUF quality 31
Approaching Hardware Solutions for Massive E-Health Sensor Data Analysis 31
Design Space Exploration Tools 29
On the adoption of FPGA for protecting cyber physical infrastructures 29
Towards Automatic Generation of Hardware Classifiers 29
Secure distribution infrastructure for hardware digital contents 28
Efficient reed-muller implementation for fuzzy extractor schemes 27
Network traffic analysis using android on a hybrid computing architecture 26
A Proposal for the Secure Activation and Licensing of FPGA IP Cores 26
A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions 26
A PUF-based mutual authentication scheme for Cloud-Edges IoT systems 25
An IP Core Remote Anonymous Activation Protocol 24
A Catalog-based AIG-Rewriting Approach to the Design of Approximate Components 22
Adopting decision tree based policy enforcement mechanism to protect reconfigurable devices 21
A PUF-based hardware mutual authentication protocol 20
An extendible design exploration tool for supporting approximate computing techniques 20
Providing mobile traffic analysis as-a-Service: Design of a service-based infrastructure to offer high-accuracy traffic classifiers based on hardware accelerators 19
Smart On-Board Surveillance Module for Safe Autonomous Train Operations 18
Mobile traffic analysis exploiting a cloud infrastructure and hardware accelerators 18
SISTEMA E METODO PER LA RAPPRESENTAZIONE DELLO STATO DI UN IMPIANTO FERROVIARIO IN UN TERMINALE OPERATORE DI TIPO COMMERCIALE SU RETE APERTA 15
Memristive devices: Technology, design automation and computing frontiers 13
A Genetic-algorithm-based Approach to the Design of DCT Hardware Accelerators 13
PUF-Enabled Authentication-as-a-Service in Fog-IoT Systems 13
A Memory Protection Strategy for Resource Constrained Devices in Safety Critical Applications 12
Practical Experience Report: Implementation, verification and validation of a safe and secure communication protocol for the railway domain 12
Input-Aware Approximate Computing 11
Special Session: Approximation and Fault Resiliency of DNN Accelerators 11
Multi-Objective Application-Driven Approximate Design Method 11
A real-time vital control module to increase capabilities of railway control systems in highly automated train operations 10
Notions on silicon physically unclonable functions 10
Scrum for safety: an agile methodology for safety-critical software systems 10
Implementation and analysis of ring oscillator circuits on xilinx FPGAs 10
A Design Space Exploration Framework for Memristor-Based Crossbar Architecture 10
Advancing synthesis of decision tree-based multiple classifier systems: an approximate computing case study 10
A Step Toward Safe Unattended Train Operations: A Pioneer Vital Control Module 9
Authenticating IoT Devices with Physically Unclonable Functions Models 7
FPGA approximate logic synthesis through catalog-based AIG-rewriting technique 7
Ring oscillators analysis for security purposes in Spartan-6 FPGAs 7
Predicting the Impact of Functional Approximation: From Component- to Application-Level 7
Chain-of-trust for microcontrollers using SRAM PUFs: The linux case study 7
Towards approximation during test of Integrated Circuits 7
Scrum for Safety: Agile Development in Safety-Critical Software Systems 7
Approximate computing: Design & test for integrated circuits 6
Formal Design Space Exploration for memristor-based crossbar architecture 6
Development and validation of a safe communication protocol compliant to railway standards 6
Towards digital circuit approximation by exploiting fault simulation 6
Testing approximate digital circuits: Challenges and opportunities 6
A pruning technique for B & B based design exploration of approximate computing variants 6
Model-Based Vital Control Architecture for Highly Automated Train Operations 6
Advancing WSN physical security adopting TPM-based architectures 6
On the comparison of different atpg approaches for approximate integrated circuits 6
Maximizing Yield for Approximate Integrated Circuits 5
Enforcing Mutual Authentication and Confidentiality in Wireless Sensor Networks Using Physically Unclonable Functions: A Case Study 5
A cloud based architecture for massive sensor data analysis in health monitoring systems 4
Digital right management for IP protection 4
Supply voltage variation impact on Anderson PUF quality 4
Special Issue on Approximate Computing: Challenges, Methodologies, Algorithms, and Architectures for Dependable and Secure Systems 3
A Test Pattern Generation Technique for Approximate Circuits Based on an ILP-Formulated Pattern Selection Procedure 3
Input-aware accuracy characterization for approximate circuits 3
An electronic laboratory on smartphones for devices with microcontroller 3
METODO E SISTEMA PER GENERARE UN'IMMAGINE DI USCITA RAPPRESENTATIVA DELLO STATO DI UN IMPIANTO FERROVIARIO 3
Lightweight Secure Keys Management Based on Physical Unclonable Functions 3
Implementing hardware decision tree prediction: A scalable approach 3
DTIS 2018 foreword 3
STT-MRAM-based PUF architecture exploiting magnetic tunnel junction fabrication-induced variability 3
Estimating dynamic power consumption for memristor-based CiM architecture 2
A Survey of Testing Techniques for Approximate Integrated Circuits 2
Automatic Test Generation to Improve Scrum for Safety Agile Methodology 2
Special Issue on Design, Technology, and Test of Integrated Circuits and Systems 2
Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices 2
Editorial: Special issue on Advancing on Approximate Computing: Methodologies, Architectures and Algorithms 2
Totale 1.285
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Categoria #
all - tutte 6.729
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 6.729
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2018/20196 0 0 0 0 0 0 0 0 0 0 3 3
2019/202082 47 0 3 1 0 8 1 1 4 1 9 7
2020/202136 6 0 2 9 2 0 0 4 5 5 3 0
2021/2022183 1 0 1 2 2 1 32 12 22 6 17 87
2022/2023488 36 39 10 29 30 40 1 46 115 97 24 21
2023/2024350 15 39 39 30 59 51 16 15 27 24 35 0
Totale 1.285