NAPOLI, ETTORE
NAPOLI, ETTORE
DIPARTIMENTO DI INGEGNERIA ELETTRICA E TECNOLOGIE DELL'INFORMAZIONE
The Effect of Charge Imbalance on Superjunction Power Devices: An Exact Analytical Solution
2008 Napoli, Ettore; H., Wang; F., Udrea
Modeling Turn-off Voltage rise in SOI LIGBT
2006 Napoli, Ettore; V., Pathirana; F., Udrea
An analytical model for the lateral insulated gate bipolar transistor(LIGBT) on thin SOI
2006 V., Pathirana; Napoli, Ettore; F., Udrea; S., Gamage
Complete Isothermal Model for the Lateral Insulated Gate Bipolar Transistor on SOI technology
2005 V., Pathirana; S., Gamage; Napoli, Ettore; F., Udrea
Circuital implementation of deep depletion SOI power devices
2006 Napoli, Ettore; F., Udrea
DEEP DEPLETION SOI POWER DEVICES
2006 Napoli, Ettore
Substrate deep depletion: an innovative design concept to improve the voltage rating of SOI power devices
2006 Napoli, Ettore; F., Udrea
Modeling Turn-off Voltage rise in SOI LIGBT
2005 Napoli, Ettore; V., Pathirana; F., Udrea
A compact model for thin SOI LIGBTs: description, experimental verification and system application
2005 Napoli, Ettore; V., Pathirana; F., Udrea; G., Bonnet; T., Trajkovic; G., Amaratunga
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS
2004 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola
Duration of the High Breakdown Voltage Phase in Deep Depletion SOI LDMOS
2007 Napoli, Ettore
Substrate Engineering for Improved Transient Breakdown Voltage in SOI Lateral Power MOS
2006 Napoli, Ettore; F., Udrea
ACCURATE PHYSICAL MODEL FOR THE LATERAL IGBT IN SILICON ON INSULATOR TECHNOLOGY
2005 Napoli, Ettore; V., Pathirana; F., Udrea
One dimensional model for the duration of the high breakdown phase in deep depletion power devices
2007 Napoli, Ettore
Physics, limits and application of the newly proposed deep depletion SOI power devices
2006 Napoli, Ettore; F., Udrea
Performance Analysis of a Two-level Carry-skip Adder Implemented in Complementary Pass-Transistor Logic
1998 Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore
Numerical Analysis of Local Lifetime control for High-speed low-loss PiN diode design
1999 Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA; Spirito, Paolo
Power rectifier model including self heating effects
1998 Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore
Algorithm for Automatic Generation of Fuzzy Rules applied to power system controllers
1998 Luciano, Angelo; Lauria, Davide; Napoli, Ettore
Fast power rectifier design using local lifetime and emitter efficiency control techniques
1999 Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA; Spirito, Paolo
Titolo | Tipologia | Data di pubblicazione | Autore(i) | File |
---|---|---|---|---|
The Effect of Charge Imbalance on Superjunction Power Devices: An Exact Analytical Solution | 1.1 Articolo in rivista | 2008 | Napoli, Ettore; H., Wang; F., Udrea | |
Modeling Turn-off Voltage rise in SOI LIGBT | 1.1 Articolo in rivista | 2006 | Napoli, Ettore; V., Pathirana; F., Udrea | |
An analytical model for the lateral insulated gate bipolar transistor(LIGBT) on thin SOI | 1.1 Articolo in rivista | 2006 | V., Pathirana; Napoli, Ettore; F., Udrea; S., Gamage | |
Complete Isothermal Model for the Lateral Insulated Gate Bipolar Transistor on SOI technology | 4.1 Articoli in Atti di convegno | 2005 | V., Pathirana; S., Gamage; Napoli, Ettore; F., Udrea | |
Circuital implementation of deep depletion SOI power devices | 4.1 Articoli in Atti di convegno | 2006 | Napoli, Ettore; F., Udrea | |
DEEP DEPLETION SOI POWER DEVICES | 4.1 Articoli in Atti di convegno | 2006 | Napoli, Ettore | |
Substrate deep depletion: an innovative design concept to improve the voltage rating of SOI power devices | 4.1 Articoli in Atti di convegno | 2006 | Napoli, Ettore; F., Udrea | |
Modeling Turn-off Voltage rise in SOI LIGBT | 4.1 Articoli in Atti di convegno | 2005 | Napoli, Ettore; V., Pathirana; F., Udrea | |
A compact model for thin SOI LIGBTs: description, experimental verification and system application | 4.1 Articoli in Atti di convegno | 2005 | Napoli, Ettore; V., Pathirana; F., Udrea; G., Bonnet; T., Trajkovic; G., Amaratunga | |
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS | 4.1 Articoli in Atti di convegno | 2004 | Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola | |
Duration of the High Breakdown Voltage Phase in Deep Depletion SOI LDMOS | 1.1 Articolo in rivista | 2007 | Napoli, Ettore | |
Substrate Engineering for Improved Transient Breakdown Voltage in SOI Lateral Power MOS | 1.1 Articolo in rivista | 2006 | Napoli, Ettore; F., Udrea | |
ACCURATE PHYSICAL MODEL FOR THE LATERAL IGBT IN SILICON ON INSULATOR TECHNOLOGY | 4.1 Articoli in Atti di convegno | 2005 | Napoli, Ettore; V., Pathirana; F., Udrea | |
One dimensional model for the duration of the high breakdown phase in deep depletion power devices | 4.1 Articoli in Atti di convegno | 2007 | Napoli, Ettore | |
Physics, limits and application of the newly proposed deep depletion SOI power devices | 4.1 Articoli in Atti di convegno | 2006 | Napoli, Ettore; F., Udrea | |
Performance Analysis of a Two-level Carry-skip Adder Implemented in Complementary Pass-Transistor Logic | 1.1 Articolo in rivista | 1998 | Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore | |
Numerical Analysis of Local Lifetime control for High-speed low-loss PiN diode design | 1.1 Articolo in rivista | 1999 | Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA; Spirito, Paolo | |
Power rectifier model including self heating effects | 1.1 Articolo in rivista | 1998 | Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore | |
Algorithm for Automatic Generation of Fuzzy Rules applied to power system controllers | 1.1 Articolo in rivista | 1998 | Luciano, Angelo; Lauria, Davide; Napoli, Ettore | |
Fast power rectifier design using local lifetime and emitter efficiency control techniques | 1.1 Articolo in rivista | 1999 | Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA; Spirito, Paolo |