A new technique for phase to sine mapping in direct digital frequency synthesizers (DDFSs) is presented. With respect to previously proposed piecewise linear Taylor and Chebyshev approaches, novel technique reduces either ROM size or arithmetic hardware complexity, without decreasing accuracy. Simulation results for a 0.35/spl mu/m technology show a substantial increase in performances with respect to Taylor and Chebyshev DDFSs.
Direct Digital Frequency Synthesis with Dual-slope Approach / Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; N., Petra. - (2003), pp. 397-400. (Intervento presentato al convegno 29th European Solid-State Circuits Conference (ESSCIRC 2003) tenutosi a Estoril (Portugal) nel Sept. 2003) [10.1109/ESSCIRC.2003.1257156].
Direct Digital Frequency Synthesis with Dual-slope Approach
STROLLO, ANTONIO GIUSEPPE MARIA;DE CARO, Davide;NAPOLI, ETTORE;
2003
Abstract
A new technique for phase to sine mapping in direct digital frequency synthesizers (DDFSs) is presented. With respect to previously proposed piecewise linear Taylor and Chebyshev approaches, novel technique reduces either ROM size or arithmetic hardware complexity, without decreasing accuracy. Simulation results for a 0.35/spl mu/m technology show a substantial increase in performances with respect to Taylor and Chebyshev DDFSs.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
