FUSELLA, EDOARDO
FUSELLA, EDOARDO
Automated synthesis of FPGA-based heterogeneous interconnect topologies
2013 Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino
Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems
2014 Cilardo, Alessandro; Fusella, Edoardo; L., Gallo; Mazzeo, Antonino
Minimizing power loss in optical networks-on-chip through application-specific mapping
2016 Fusella, Edoardo; Cilardo, Alessandro
On the design of a path-setup architecture for exploiting hybrid photonic-electronic NoCs
2015 Fusella, Edoardo; Flich, Jose; Cilardo, Alessandro; Mazzeo, Antonino
Exploiting concurrency for the automated synthesis of MPSoC interconnects
2015 Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino
Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip
2015 Fusella, Edoardo; Cilardo, Alessandro; Mazzeo, Antonino
Crosstalk-aware mapping for tile-based optical network-on-chip
2015 Fusella, Edoardo; Cilardo, Alessandro
Design automation for application-specific on-chip interconnects: A survey
2016 Cilardo, Alessandro; Fusella, Edoardo
PhoNoCMap: An application mapping tool for photonic networks-on-chip
2016 Fusella, Edoardo; Cilardo, Alessandro
Lighting up on-chip communications with photonics: Design tradeoffs for optical NoC architectures
2016 Fusella, Edoardo; Cilardo, Alessandro
Crosstalk-aware automated mapping for optical networks-on-chip
2016 Fusella, Edoardo; Cilardo, Alessandro
Automated design space exploration for FPGA-based heterogeneous interconnects
2014 Cilardo, Alessandro; Fusella, Edoardo; L., Gallo; Mazzeo, Antonino; Mazzocca, Nicola
Lattice-based Turn Model for Adaptive Routing
2017 Fusella, Edoardo; Cilardo, Alessandro
H²ONoC: A Hybrid Optical-Electronic NoC Based on Hybrid Topology
2017 Fusella, Edoardo; Cilardo, Alessandro
Path Setup for Hybrid NoC Architectures Exploiting Flooding and Standby
2017 Fusella, Edoardo; Flich, José; Cilardo, Alessandro
Application-Specific Mapping Optimizations for Photonic Networks-on-Chip
2017 Fusella, Edoardo; Cilardo, Alessandro; Flich, Jose
Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration
2018 FLICH CARDO, Jose'; and Cilardo, J.; Kovac, Mario; and Tornero, M.; and Gagliardi, R.; and Fusella, M.; and Martínez, E.; and Picornell, J. M.
Understanding turn models for adaptive routing: The modular approach
2018 Fusella, E.; Cilardo, A.
Reducing Power Consumption of Lasers in Photonic NoCs through Application-Specific Mapping
2018 Fusella, Edoardo; Cilardo, A.
Improving Deep Learning with a customizable GPU-like FPGA-based accelerator
2018 Gagliardi, Mirko; Fusella, E.; Cilardo, A.
| Titolo | Tipologia | Data di pubblicazione | Autore(i) | File |
|---|---|---|---|---|
| Automated synthesis of FPGA-based heterogeneous interconnect topologies | 4.1 Articoli in Atti di convegno | 2013 | Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino | |
| Joint communication scheduling and interconnect synthesis for FPGA-based many-core systems | 4.1 Articoli in Atti di convegno | 2014 | Cilardo, Alessandro; Fusella, Edoardo; L., Gallo; Mazzeo, Antonino | |
| Minimizing power loss in optical networks-on-chip through application-specific mapping | 1.1 Articolo in rivista | 2016 | Fusella, Edoardo; Cilardo, Alessandro | |
| On the design of a path-setup architecture for exploiting hybrid photonic-electronic NoCs | 4.1 Articoli in Atti di convegno | 2015 | Fusella, Edoardo; Flich, Jose; Cilardo, Alessandro; Mazzeo, Antonino | |
| Exploiting concurrency for the automated synthesis of MPSoC interconnects | 1.1 Articolo in rivista | 2015 | Cilardo, Alessandro; Fusella, Edoardo; Gallo, Luca; Mazzeo, Antonino | |
| Scheduling-aware interconnect synthesis for FPGA-based Multi-Processor Systems-on-Chip | 4.1 Articoli in Atti di convegno | 2015 | Fusella, Edoardo; Cilardo, Alessandro; Mazzeo, Antonino | |
| Crosstalk-aware mapping for tile-based optical network-on-chip | 4.1 Articoli in Atti di convegno | 2015 | Fusella, Edoardo; Cilardo, Alessandro | |
| Design automation for application-specific on-chip interconnects: A survey | 1.1 Articolo in rivista | 2016 | Cilardo, Alessandro; Fusella, Edoardo | |
| PhoNoCMap: An application mapping tool for photonic networks-on-chip | 4.1 Articoli in Atti di convegno | 2016 | Fusella, Edoardo; Cilardo, Alessandro | |
| Lighting up on-chip communications with photonics: Design tradeoffs for optical NoC architectures | 1.1 Articolo in rivista | 2016 | Fusella, Edoardo; Cilardo, Alessandro | |
| Crosstalk-aware automated mapping for optical networks-on-chip | 1.1 Articolo in rivista | 2016 | Fusella, Edoardo; Cilardo, Alessandro | |
| Automated design space exploration for FPGA-based heterogeneous interconnects | 1.1 Articolo in rivista | 2014 | Cilardo, Alessandro; Fusella, Edoardo; L., Gallo; Mazzeo, Antonino; Mazzocca, Nicola | |
| Lattice-based Turn Model for Adaptive Routing | 1.1 Articolo in rivista | 2017 | Fusella, Edoardo; Cilardo, Alessandro | |
| H²ONoC: A Hybrid Optical-Electronic NoC Based on Hybrid Topology | 1.1 Articolo in rivista | 2017 | Fusella, Edoardo; Cilardo, Alessandro | |
| Path Setup for Hybrid NoC Architectures Exploiting Flooding and Standby | 1.1 Articolo in rivista | 2017 | Fusella, Edoardo; Flich, José; Cilardo, Alessandro | |
| Application-Specific Mapping Optimizations for Photonic Networks-on-Chip | 2.1 Contributo in volume (Capitolo o Saggio) | 2017 | Fusella, Edoardo; Cilardo, Alessandro; Flich, Jose | |
| Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration | 2.1 Contributo in volume (Capitolo o Saggio) | 2018 | FLICH CARDO, Jose'; and Cilardo, J.; Kovac, Mario; and Tornero, M.; and Gagliardi, R.; and Fusella, M.; and Martínez, E.; and Picornell, J. M. | |
| Understanding turn models for adaptive routing: The modular approach | 4.1 Articoli in Atti di convegno | 2018 | Fusella, E.; Cilardo, A. | |
| Reducing Power Consumption of Lasers in Photonic NoCs through Application-Specific Mapping | 1.1 Articolo in rivista | 2018 | Fusella, Edoardo; Cilardo, A. | |
| Improving Deep Learning with a customizable GPU-like FPGA-based accelerator | 4.1 Articoli in Atti di convegno | 2018 | Gagliardi, Mirko; Fusella, E.; Cilardo, A. |