In this paper we present an approach for the automatic generation of simulation workflow diagrams used for system verifications. By using this approach, the system engineer can specify the verification components at the system development phases. The workflow description is generated with an algorithm that converts the system level specifications to XDSM diagrams. These diagrams help in the communication and collaboration between system engineers and other discipline engineers. They also help in implementing the verification process in dedicated MDO/MSDO software frameworks. An example of a speed reducer system is considered to illustrate the usefulness of the proposed approach.
Automatic generation of simulation workflows for system verification using XDSM representation / Hammadi, M.; Patalano, S.. - (2017), pp. 1-6. (Intervento presentato al convegno 3rd Annual IEEE International Symposium on Systems Engineering, ISSE 2017 tenutosi a Vienna, Austria nel 11-13 October 2017) [10.1109/SysEng.2017.8088306].
Automatic generation of simulation workflows for system verification using XDSM representation
Hammadi M.;Patalano S.
2017
Abstract
In this paper we present an approach for the automatic generation of simulation workflow diagrams used for system verifications. By using this approach, the system engineer can specify the verification components at the system development phases. The workflow description is generated with an algorithm that converts the system level specifications to XDSM diagrams. These diagrams help in the communication and collaboration between system engineers and other discipline engineers. They also help in implementing the verification process in dedicated MDO/MSDO software frameworks. An example of a speed reducer system is considered to illustrate the usefulness of the proposed approach.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.