In this paper a novel Power Factor Correction (PFC) dual boost scheme is proposed. It is based on an optimized power sharing where the active filtering approach is used to increase the current quality and at the same time to reduce the switching losses. A prototype of Dual Boost PFC controlled by a FPGA evaluation board was set up to implement the proposed control strategy. Both the simulation and experimental results show that the proposed strategy for PFC achieves near unity power factor and a not negligible switching losses reduction.
Dual Boost High Performances Power Factor Correction (PFC) / G., Tomasso; Attaianese, C; Nardi, V; Parillo, F. - 1:(2008), pp. 1027-1032. (Intervento presentato al convegno Applied Power Electronics Conference and Exposition tenutosi a Austin (Texas) - USA nel 24-28/02/2008) [10.1109/APEC.2008.4522848].
Dual Boost High Performances Power Factor Correction (PFC)
G. TOMASSO;ATTAIANESE C
;
2008
Abstract
In this paper a novel Power Factor Correction (PFC) dual boost scheme is proposed. It is based on an optimized power sharing where the active filtering approach is used to increase the current quality and at the same time to reduce the switching losses. A prototype of Dual Boost PFC controlled by a FPGA evaluation board was set up to implement the proposed control strategy. Both the simulation and experimental results show that the proposed strategy for PFC achieves near unity power factor and a not negligible switching losses reduction.| File | Dimensione | Formato | |
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