High-precision time-to-digital converters in a FPGA device

The construction and design process of two high-resolution time-interval measuring systems implemented in a SRAM-based FPGA device is discussed in this paper. The two TDCs can increase the precision on the measurement by interpolating time within the system clock cycle. In order to perform fine time measurement two different architectures have been realized. The first one uses dedicated carry lines while the second one uses a differential tapped delay line. We designed and built a PCB hosting a Virtex-5 Xilinx FPGA and high stability oscillators to verify the performance of the two different architectures. We show the main characteristics of the board and the performance achieved in terms of stability and resolution. ©2008 IEEE.