A new simple and accurate formulation for the blocking gain of a recessed-gate SIT is presented, based on a closed-form solution of the two-dimensional potential distribution in the device. By using the proposed model and an expression of on-resistance derived from literature, the basic trade-off between blocking gain and on-resistance is investigated. The possibility of optimizing the SIT onresistance, for given values of blocking gain and breakdown voltage, is also discussed. Comparisons with other analytical models previously proposed and with two-dimensional numerical simulations are presented.
Trade-off between blocking gain and on-resistance in static induction transistor / Strollo, ANTONIO GIUSEPPE MARIA. - In: SOLID-STATE ELECTRONICS. - ISSN 0038-1101. - STAMPA. - 38:(1995), pp. 309-315. [10.1016/0038-1101(94)00092-T]
Trade-off between blocking gain and on-resistance in static induction transistor
STROLLO, ANTONIO GIUSEPPE MARIA
1995
Abstract
A new simple and accurate formulation for the blocking gain of a recessed-gate SIT is presented, based on a closed-form solution of the two-dimensional potential distribution in the device. By using the proposed model and an expression of on-resistance derived from literature, the basic trade-off between blocking gain and on-resistance is investigated. The possibility of optimizing the SIT onresistance, for given values of blocking gain and breakdown voltage, is also discussed. Comparisons with other analytical models previously proposed and with two-dimensional numerical simulations are presented.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
