Targeting only the portion of an FPGA actually used in a given application, the so-called application-dependent test (ADT) can be used to reduce testing efforts and time as well as to enable defect tolerance and improve the manufacturing yield, since it excludes those faults that do not affect the design for which the FPGA will be used. In spite of its inherent advantages, ADT has very limited support, if any, in both academic and commercial tools currently available. To address this limitation, this work introduces an integrated software environment for application-dependent test of FPGAs. The environment architecture is comprised of a variety of tools, such as a SAT solver, a fault simulator, a package for visual inspection of the networks, a custom benchmark generator, and various custom fault list generators and test configuration generators. The architecture is highly modular and extensively based on a plug-in approach, enabling third-party test strategies and configuration generation logic to be easily integrated. To demonstrate the potential of the environment, we developed a complete suite of plug-ins, based on both state-of-the-art and novel ADT techniques. The test configuration generation module addresses some limitations of existing approaches, related to the exhaustiveness of the faults covered (with special regard to feedback bridging faults) as well as some convergence issues caused by existing techniques. The experimental results presented at the end of the paper, obtained from a set of real-world benchmarks, confirm the effectiveness of the environment architecture as well as the impact of the new ADT techniques implemented in the proof-of-concept plug-ins.

An Integrated Environment for Application-Dependent Testing of FPGA Device / Cilardo, Alessandro; Lofiego, Carmelo; Mazzocca, Nicola. - (2011), pp. 287-287. (Intervento presentato al convegno 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems tenutosi a Cottbus (Germania) nel 13-15 Aprile 2011).

An Integrated Environment for Application-Dependent Testing of FPGA Device

CILARDO, Alessandro;LOFIEGO, CARMELO;MAZZOCCA, NICOLA
2011

Abstract

Targeting only the portion of an FPGA actually used in a given application, the so-called application-dependent test (ADT) can be used to reduce testing efforts and time as well as to enable defect tolerance and improve the manufacturing yield, since it excludes those faults that do not affect the design for which the FPGA will be used. In spite of its inherent advantages, ADT has very limited support, if any, in both academic and commercial tools currently available. To address this limitation, this work introduces an integrated software environment for application-dependent test of FPGAs. The environment architecture is comprised of a variety of tools, such as a SAT solver, a fault simulator, a package for visual inspection of the networks, a custom benchmark generator, and various custom fault list generators and test configuration generators. The architecture is highly modular and extensively based on a plug-in approach, enabling third-party test strategies and configuration generation logic to be easily integrated. To demonstrate the potential of the environment, we developed a complete suite of plug-ins, based on both state-of-the-art and novel ADT techniques. The test configuration generation module addresses some limitations of existing approaches, related to the exhaustiveness of the faults covered (with special regard to feedback bridging faults) as well as some convergence issues caused by existing techniques. The experimental results presented at the end of the paper, obtained from a set of real-world benchmarks, confirm the effectiveness of the environment architecture as well as the impact of the new ADT techniques implemented in the proof-of-concept plug-ins.
2011
An Integrated Environment for Application-Dependent Testing of FPGA Device / Cilardo, Alessandro; Lofiego, Carmelo; Mazzocca, Nicola. - (2011), pp. 287-287. (Intervento presentato al convegno 2011 IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems tenutosi a Cottbus (Germania) nel 13-15 Aprile 2011).
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11588/422906
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