A Design-Oriented Predictive Framework for Interphase Transformer Sizing in Interleaved Inverter Systems Under Current Measurement Tolerances

Interleaved operation of parallel three-phase inverters reduces load current ripple but amplifies circulating currents (CCs), which can compromise efficiency and reliability. High-frequency CCs are typically suppressed by interphase transformers (IPTs), whose magnetic cores must operate without saturation. However, practical asymmetries and current measurement errors make perfect cancellation of low-frequency CCs unfeasible, resulting in flux bias and possible saturation-induced current spikes. This paper presents a novel design-oriented framework that explicitly incorporates current sensing inaccuracies into the IPT sizing process. Unlike conventional rule-of-thumb oversizing, the proposed approach analytically links sensor tolerances to the magnetizing current and defines predictive margins for avoiding core saturation. The methodology is validated through simulations and experiments on a 60 kVA interleaved inverter prototype under controlled sensing errors and varying load conditions. Results confirm that the framework enables reliable and compact IPT design while preventing saturation-induced failures, thereby improving robustness without unnecessary oversizing.