SiC MOSFETs soft and hard failure modes: functional analysis and structural characterization

This paper discusses first the discriminating phenomena yielding either a fail-to-short or fail-to-open circuit signature in 1200 V SiC power MOSFETs undergoing short-circuit electro-thermal stress. Since fail-to-open behavior is of particular relevance to the application, the paper goes on to propose a benchmarking of a number of commercial devices, identifying a single product which offers consistent fail-to-open characteristics with bias voltages up to at least 50% of nominal rating. For that particular device, a thorough functional and structural characterization is presented. In particular, it is shown that: the gate current is an effective monitor of ensuing degradation under short-circuit stress and can be used to assess damage accumulation, as well as the reversible or permanent nature of device degradation; fail-to-open signature is associated with degradation of the gate-structure, with the creation of short-circuits between the gate and source terminals in regions relatively far away from the active cells and not involving the field oxide. The findings are relevant to application of both discrete devices and multi-chip power modules, including multiple parallel connected dies.