The paper proposes a SISO register circuit, functionally equivalent to a Shift Register, that is the optimal design choice when the input data have a reduced transition probability. The proposed circuit obtains improved performances by only storing the transitions of the input data, thus saving logic and power.
A SISO register circuit tailored for input data with low transition probability / Napoli, Ettore; Castellano, Gerardo; DE CARO, Davide; Esposito, Darjn; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA. - In: IEEE TRANSACTIONS ON COMPUTERS. - ISSN 0018-9340. - 66:1(2017), pp. 45-51. [10.1109/TC.2016.2574348]
A SISO register circuit tailored for input data with low transition probability
NAPOLI, ETTORE;CASTELLANO, GERARDO;DE CARO, Davide;ESPOSITO, DARJN;PETRA, NICOLA;STROLLO, ANTONIO GIUSEPPE MARIA
2017
Abstract
The paper proposes a SISO register circuit, functionally equivalent to a Shift Register, that is the optimal design choice when the input data have a reduced transition probability. The proposed circuit obtains improved performances by only storing the transitions of the input data, thus saving logic and power.File in questo prodotto:
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