A new sense-amplifier-based flip-flop is presented. The output latch of the proposed circuit can be considered as an hybrid solution between the standard NAND-based set/reset latch and the NC-2MOS approach. The proposed flip-flop provides ratioless design, reduced short-circuit power dissipation, and glitch-free operation. The simulation results, obtained for a 0.25- m technology, show improvements in the clock-to-output delay and the power dissipation with respect to the recently proposed high-speed flip-flops. The new circuit has been successfully employed in a high-speed direct digital frequency synthesizer chip, highlighting the effectiveness of the proposed flip-flop in high-speed standard cell-based applications.

A novel high-speed sense-amplifier-based flip-flop / Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - STAMPA. - 13:11(2005), pp. 1266-1274. [10.1109/TVLSI.2005.859586]

A novel high-speed sense-amplifier-based flip-flop

STROLLO, ANTONIO GIUSEPPE MARIA;DE CARO, Davide;NAPOLI, ETTORE;PETRA, NICOLA
2005

Abstract

A new sense-amplifier-based flip-flop is presented. The output latch of the proposed circuit can be considered as an hybrid solution between the standard NAND-based set/reset latch and the NC-2MOS approach. The proposed flip-flop provides ratioless design, reduced short-circuit power dissipation, and glitch-free operation. The simulation results, obtained for a 0.25- m technology, show improvements in the clock-to-output delay and the power dissipation with respect to the recently proposed high-speed flip-flops. The new circuit has been successfully employed in a high-speed direct digital frequency synthesizer chip, highlighting the effectiveness of the proposed flip-flop in high-speed standard cell-based applications.
2005
A novel high-speed sense-amplifier-based flip-flop / Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola. - In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS. - ISSN 1063-8210. - STAMPA. - 13:11(2005), pp. 1266-1274. [10.1109/TVLSI.2005.859586]
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11588/203552
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